1, Logic gates: (1). Write three basic logic gates. D- this is gate this is this is gate gate (2). If A = 1, B=1; the value of A XOR B is If A = 1, B=0; the value of A XOR B is
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- Noise margin is the amount of O a. both signal and noise voltage that a logic gate can tolerate O b. noise voltage that a logic gate can tolerate Ос. None of the choices are correct O d. signal voltage that a logic gate can tolerate2- The short circuit is defined as resistance, then the current is . .Amper.1. A(n) is a device that performs a basic operation on electrical signals. 2. diagrams can be used to describe the behavior of gates and circuits. 3. The circle that's part of the logic diagram symbol for a NOT gate is called a(n) bubble. 4. The XOR gate is also referred to as a(n) OR gate. 5. A(n) either conducts or blocks the flow of electricity, based on an input value
- 1. Define what logic gates are and how/where we use them. 2. How Boolean logic correlates to the logic gates. 3. Create in Raptor the logic of an AND gate. If the user inputs two values, consisting of 0's or 1's , what would be the output of the Raptor program. For example: If the user enters 1 and 0, the output would be 0 according to logic gates and/or Truth Tables.Design logic circuits that controls an elevator door in a 3 story building. The circuit has a for input lines. M is a logic circuit that indicates when the elevator is moving (M = 1) or stopped (M = 0). F1, F2, F3 are floor indicator signals that are normally low, and they go hi only when the elevator is positioned at the level of the particular floor. For example, when the elevator is lineup level with the second floor F2=1 and F1 = F3 = 0 the circuit output is the OPEN signal which is normally Low and it is to go HIGH when the elevator door is to be openedA circuit is constructed with four resistors, one inductor, one battery and a switch as shown. The values for the resistors are: R1 = R2 = 72 Q, R3 = 61 Q and R4 = 99 Q. The inductance is L = %3D V L 549 mH and the battery voltage is V = 24 V. R3 1) The switch has been open for a long time when at time t = 0, the switch is closed. What is l1(0), the magnitude of the current through the resistor R1 just after the switch is closed? A Submit 2) What is 1(o0), the magnitude of the current that flows through the resistor R1 a very long time after the switch has been closed? A Submit 3) What is VL(0), the magnitude of the voltage across the inductor just after the switch is closed? V Submit 4) What is IL(0), the magnitude of the current through the inductor after the switch has been closed for a very long time? A Submit 5) What is I2(0), the magnitude of the current through the resistor R2 just after the switch is closed? A Submit
- 6. For the following Verilog code, draw the corresponding circuit diagram for "bigMod". Your circuit should only involve standard gates (AND, OR, NAND, NOR, XOR, Inverter), and the variable names Val, X, Y, and Z. DO NOT SIMPLIFY THE CIRCUIT. Note: all of the code is legal Verilog, with no errors. module tstMod (F, A, B, C); output logic F; input logic A, B, C; assign F endmodule = (A & ~B & C) | (A & C) | ~B; module bigMod (Val, X, Y, output logic Val; input logic X, Y, Z; logic T; Z); .C (Y)); tstMod T1 (.F (T), .A (X), .B (1'bl), tstMod T2 (.F (Val), .A(Z), .B (T), .C (X)); endmoduleQ3: A majority circuit is a combinational circuit whose output is equal to 1 if the input variables have more 1's than 0's. The output is 0 otherwise. Answer 3 of the following questions: A- Design a 3-input majority circuit by finding the circuit's truth table, Boolean equation, and a logic diagram? B- Program and determine how many Configurable logic block (CLB) you wouid need for such circuit in Part A to be implemented in the FPGA then program this FPGA to emulate 3-input majority if you know that the CLB structure are: Look-Up Table (LUT) MUX A+B-t OLR C- Redesign the logic circuit of Part A using universal logic gate NOR?LOGIC GATES: Draw the truth table and draw out the circuit of the expression. F=ABC(C+D')
- Circuit Assignment (Digital Logic) You have been hired by a home security company to design and implement a home alarm system. The logic of the system is as follows: Once the alarm system has been armed, it is to sound if the front door is opened, or (the back door is opened and window is opened). Design the necessary circuit using use any method to implement the situation above. Your circuit should have 4 inputs (A-alarm, F=front door, B-back door, W= window). A=1 means the system is Armed. F-1 means Front door is open. B-1 means Back door is open. W=1 means Window is open. There should be one output S. When S= 1 the alarm should sound, otherwise the alarm is silence. Submit these 3 items: 1- Create the formula, S = ... in terms of the variables 2 - Create the truth table, 3- Draw the Circuit. (You can use the zyBooks tool to build the circuit and screen shot the circuit image.)Q6-A The process of opening an entrance gate is controlled by a logic circuit which has three inputs indicated by Remote controller (R), Keypad (K) and Alarm system (A). This controller create a signal CONT that control the motor of the gate. If the signal CONT is "HIGH", the motor will open the door. Otherwise, if the signal CONT is "LOW" the motor will not open the door as shown in the following figure. The signal CONT will be "HIGH" when following conditions occurs: • Ris "LOW", K is "HIGH" and A is "LOW" • Ris "LOW", K is "HIGH" and A is "HIGH" • Ris "HIGH", K is “HIGH", A is “LOW" • All inputs (R, K and A) are "HIGH" Hint: HIGH could be considered as "1" and LOW could be considered as “0" i Define the Boolean expression of the output CONT ii. Simplify the determined CONT by using K-Map iii. Sketch the logic gate circuit that can produce he output CONT by using R, K and A based on the simplified Boolean expression | K Gate CONT Controller A Q6 - B Subtract these hexadecimal…A bank burglar alarm (A) is to activate if it is after bank hours (H) and the front door is opened (F) orif it is after banking hours (H) and the vault door is opened (V).Construct the Truth Table for A(H, F, V), write the Boolean logic equation and draw the logiccircuit that represents the situation above.