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- 1. Gray code to Binary converter: Gray code is one of the codes used in digital systems. It has the advantage over binary numbers that only one bit in the code word changes when going from one number to the next. (See Table 1). Design a combinational circuit with 4 inputs and 4 outputs that converts a four- bit gray code number into an equivalent four-bit Binary number. Use Karnaugh map technique for simplification. Use LogicWorks for pre-lab demonstrations. Select the library "7400dev.clf* in the Parts Palette and then select the XOR chip 74-86. This would give you a set of 4 XOR's as shown in Fig. 1, just like the hardware chip 74-86. You could use as many as needed from these XOR gates in your design. Get back to ALL LIBRARIES and select switches for the inputs and Binary Probes as indicators of the outputs. Verify your design in the pre-Lab. During the Lab construct the circuit and verify its operations.parity generator design, construct and test a circuit that generates an even parity bit ffrom four messages bits . use XOR gates. adding one more XOR gate, expand the circuit so that it generates an odd parity bit also.Question 3: a) Design a circuit which will add a 4-bit binary number to a 5-bit binary number. Use five full adders. Assume negative numbers are represented in 2's complement. (Hint: How do you make a 4-bit binary number into a 5-bit binary number, without making a negative number positive or a positive number negative?) b) A half adder is a circuit that adds two bits to give a sum and a carry. Give the truth table for a half adder, and design the circuit using only two gates. Then design a circuit which will find the 2's complement of a 4-bit binary number. Use four half adders and any additional gates. (Hint: Recall that one way to find the 2's complement of a binary number is to complement all bits, and then add 1.)
- Derive the circuits for a three-bit parity generator and a four-bit parity checker using an odd-parity bit.DFF circuit that adds the one-bit numbers a and b in series. Design according to the Mealy model a)state diagram b)state table c)simplification with Karnaugh mapsDesign a binary multiplier that multiplies two 8-bit binary number by following design rules thatshown in class. The Q and B are the two separate 8-bit binary inputs, C is the 3-bit sequence counterand R is the 16-bit result. (Note: Explain the registers that you will use to establish given process.) The steps are writing algorithm Drawing circuit undetailed (Just use the box, which have only writin under that their functions) Draw logic circuits one by one showing the internal structure of the boxes. Mahe flow chards for registers
- Construct a circuit diagram that checks whether the two numbers A and B are in the ratio of 2:3. Also, derive the final Boolean equation for the function. F = 1 if A: B = 2: 3,0 otherwise Here, A and B both are 3 bit binary numbers. NB: You cannot use the IC of comparator, meaning for the comparison part, you need to draw the gate level diagram. You can use block level diagrams for the rest of the parts.Design a combinational circuit with the four inputs A,B.C, and D, and three outputs X, Y, and Z. When the binary input is odd number, the binary output is one lesser than the input. When the binary input is even number the binary output is one greate than the input. Implement the function using multiplexers with minimal input and select line.The upper 16 -bit binary count value are displayed on the four seven -segemnt displays as four hexadecimal digits. Hexadecimal values aren't good for human perception. How would you suggest the counter design be modified so that only decimal count values are displayed.
- Design a combinational circuit with 3-inputs and 1-output. The output is equal to logic-1 when the binary value of the input is less than 3. And the output is logic-0 otherwise.2. Generate 4x2 Priority encoder truth table and draw logic circuit diagram and schematic. Construct and verify if the circuit prioritizes the highest input only. (You must not use the standard priority encoder ICs included in Circuit Verse)Q4) 1) Design a four-bit binary synchronous counter with D flip-flops. 2) Design a four-bit binary ring counter with T flip-flops. 3) Design a four-bit binary Johnson counter with T flip-flops. 4) Design a combinational circuit that compares two 4-bit numbers to check if they are equal. The circuit output is equal to 1 if the two numbers are equal and 0 otherwise 5) Design an excess-3-to-binary decoder using the unused combinations of the code as don't-care conditions 6) Draw the logic diagram of a 2-to-4-line decoder using (a) NOR gates only and (b) NAND gates only. Include an enable input 7) Design a BCD-to-decimal decoder using the unused combinations of the BCD code as don't-care conditions.