Given the User Mode register and memory contents shown below, predict the register contents and, where appropriate, the flag states produced by each of the following ARM instructions. Assume little-endian memory storage and that the instructions are not sequential.

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Chapter5: Making Decisions
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4. Given the User Mode register and memory contents shown below, predict the register contents
and, where appropriate, the flag states produced by each of the following ARM instructions.
Assume little-endian memory storage and that the instructions are not sequential.
Register Value
Register Value
Address
Data
RO
Ox00001234
R8
Ох00000000
Ox00008050
Ох35
R1
OXFFFF0000
R9
Ох000000АЗ
Ox00008051
OXC3
R2
OXAB10FE10
R10
Ox00000000
Ox00008052
Ox40
R3
OX5555AAAA R11
Ox00000000
Ox00008053
OX4E
R4
Ox00000000
R12
Ox00000000
Ox00008054
OXB3
R5
Ox00008050
R13
Ох00000000
Ох00008055
OXFA
R6
Ox00008050
R14
Ox00008058
Ox00008056
Ох01
R7
Ox00000000
Ox00008057
Ох32
Ox00008058
Ox23
Ox00008059
Ох81
OX0000805A Ox33
OX0000805B
ОХА1
OX0000805C Ox07
NZ
a) CMP R6, RO
b) ORRS R1, R2, R1
Flags
Flags
Flags
R6
RO
R1
R2
c) LDR R1, [R5, #8]! R1
R5
d) MOV PC, LR
PC
LR
Flags
Transcribed Image Text:4. Given the User Mode register and memory contents shown below, predict the register contents and, where appropriate, the flag states produced by each of the following ARM instructions. Assume little-endian memory storage and that the instructions are not sequential. Register Value Register Value Address Data RO Ox00001234 R8 Ох00000000 Ox00008050 Ох35 R1 OXFFFF0000 R9 Ох000000АЗ Ox00008051 OXC3 R2 OXAB10FE10 R10 Ox00000000 Ox00008052 Ox40 R3 OX5555AAAA R11 Ox00000000 Ox00008053 OX4E R4 Ox00000000 R12 Ox00000000 Ox00008054 OXB3 R5 Ox00008050 R13 Ох00000000 Ох00008055 OXFA R6 Ox00008050 R14 Ox00008058 Ox00008056 Ох01 R7 Ox00000000 Ox00008057 Ох32 Ox00008058 Ox23 Ox00008059 Ох81 OX0000805A Ox33 OX0000805B ОХА1 OX0000805C Ox07 NZ a) CMP R6, RO b) ORRS R1, R2, R1 Flags Flags Flags R6 RO R1 R2 c) LDR R1, [R5, #8]! R1 R5 d) MOV PC, LR PC LR Flags
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