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In this example we consider the design of the current source that supplies the bias current of a MOS differential amplifier. Let it be required to achieve a CMRR of 100 dB and assume that the only source of mismatch between Q, and Q, is a 2% mismatch in their WIL ratios. Let I= 200 µA and assume that all transistors are to be operated at Vov = 0.2 V. For the 0.18-um CMOS fabrication process available, V= 5 V/um. If a simple current source is utilized for I, what channel length is required? If a cascode current source is utilized, what channel length is needed for the two transis- tors in the cascode? %3D

In this example we consider the design of the current source that supplies the bias current of a MOS differential amplifier. Let it be required to achieve a CMRR of 100 dB and assume that the only source of mismatch between Q, and Q, is a 2% mismatch in their WIL ratios. Let I= 200 µA and assume that all transistors are to be operated at Vov = 0.2 V. For the 0.18-um CMOS fabrication process available, V= 5 V/um. If a simple current source is utilized for I, what channel length is required? If a cascode current source is utilized, what channel length is needed for the two transis- tors in the cascode? %3D

Introductory Circuit Analysis (13th Edition)
Introductory Circuit Analysis (13th Edition)
13th Edition
ISBN:9780133923605
Author:Robert L. Boylestad
Publisher:Robert L. Boylestad
Chapter1: Introduction
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Example 1 In this example we consider the design of the current source that supplies the bias current of a MOS differential amplifier. Let it be required to achieve a CMRR of 100 dB and assume that the only source of mismatch between Q, and Q, is a 2% mismatch in their WL ratios. Let I= 200 µA and assume that all transistors are to be operated at Vov = 0.2 V. For the 0.18-um CMOS fabrication process available, V= 5 V/umm. If a simple cucrent source is utilized for I, what channel length is required? If a cascode current saurce is utilized, what channel length is needed for the two transis- tors in the cascode? Solution: A mismatch in W/L results in a gm mismatch 2(4,Cor)D (W L Em = It can be seen that an error of 2% in WIL will result in an error in g of 1%. Agm CMRR = (2g„Rss/( !! Now, a 100-dB CMRR corresponds to a ratio of 10"; thus, 10° = (2g„Rss)/0.01 %3D The value of g. can be found from 21, 2x (I/2) Em = Vov Vov 2x01 Res= 500 k2
Transcribed Image Text:Example 1 In this example we consider the design of the current source that supplies the bias current of a MOS differential amplifier. Let it be required to achieve a CMRR of 100 dB and assume that the only source of mismatch between Q, and Q, is a 2% mismatch in their WL ratios. Let I= 200 µA and assume that all transistors are to be operated at Vov = 0.2 V. For the 0.18-um CMOS fabrication process available, V= 5 V/umm. If a simple cucrent source is utilized for I, what channel length is required? If a cascode current saurce is utilized, what channel length is needed for the two transis- tors in the cascode? Solution: A mismatch in W/L results in a gm mismatch 2(4,Cor)D (W L Em = It can be seen that an error of 2% in WIL will result in an error in g of 1%. Agm CMRR = (2g„Rss/( !! Now, a 100-dB CMRR corresponds to a ratio of 10"; thus, 10° = (2g„Rss)/0.01 %3D The value of g. can be found from 21, 2x (I/2) Em = Vov Vov 2x01 Res= 500 k2
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