Microelectronic Circuits (The Oxford Series in Electrical and Computer Engineering) 7th edition
7th Edition
ISBN: 9780199339136
Author: Adel S. Sedra, Kenneth C. Smith
Publisher: Oxford University Press
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Chapter 7, Problem 7.48P
To determine
To find: The dc voltage at the collector current, value of
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7.54 In the circuit shown in Fig. P7.54, the transistor has a
ß of 200. What is the de voltage at the collector? Replacing
the BJT with one of the hybrid-r models (neglecting r),
draw the equivalent circuit of the amplifier. Find the input
resistances R, and R, and the overall voltage gain (v,/v).
For an output signal of ±0.3 V, what values of v and v, are
required?
+5 V
+1.5 V
()I mA
10 k2
Rsig
1 kΩ
Rc
1 kN
Rin
Rih
Figure P7.54
b)The transistor consists of three terminals. The main reason for designing configurations is that it requires four terminals in order to provide the input and the output connections of the circuit for effective amplification. Now in your own words describe how Bipolar Transistors Transistor ( BJT ) various configurations are designed with relating diagrams. In your own estimation evalute which one is most widely used when looking at appreciable output for an amplifier?
*7.58 The transistor in the circuit shown in Fig. P7.58 is
biased to operate in the active mode. Assuming that B is
very large, find the collector bias current Ie. Replace the
transistor with the small-signal equivalent-circuit model of
Fig. 7.27(b) (remember to replace the de power supply with
a short circuit). Analyze the resulting amplifier equivalent
circuit to show that
RE
R +r.
-aR.
%3D
v,
R; +r,
Find the values of these voltage gains (for a 2 1). Now, if
the terminal labeled v, is connected to ground, what does the
voltage gain v/v, become?
+5 V
Rc = 3.3 kN
100 kΩ
100 kΩ
R = 3.6 kN
Figure P7.58
Chapter 7 Solutions
Microelectronic Circuits (The Oxford Series in Electrical and Computer Engineering) 7th edition
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- Draw Frequency response of common emitter amplifier and explain all the parameters in the graph. Draw the circuit of CE amplifier that is used to find the frequency response and give the main procedure to implement the experimentarrow_forwardD *7.115 For the circuit in Fig. P7.115, assuming all transistors to be identical with ß infinite, derive an expression for the output current lo, and show that by selecting R1 = R2 and keeping the currents in all junctions equal, the current lo will be Vcc 2R, which is independent of VBg. What must the relationship of RĘ to R1 and R2 be? For VCC= 10 V and VBE = 0.7 V, design the circuit to obtain an output current of 0.5 mA. What is the lowest voltage that can be applied to the collector of Q3? Vcc RE R Figure P7.115arrow_forwardQUESTION 1 a) As an electronics engineer, you are given a task to design power amplifier using the Bipolar Junction Transistor (BJT). You are required to get the efficiency of the power amplifier up to 78.5%. Suggest the selected power amplifier's class and sketch the circuit. Discuss one problem that commonly arise with the selected power amplifier and propose the method to improve it. b) One of the commonly used model in small signal ac analysis of transistor network is re model. Explain the steps to obtain the ac equivalent network by sketching the appropriate circuit diagram.arrow_forward
- 7.120 Figure P7.120 shows a scheme for coupling and amplifying a high-frequency pulse signal. The circuit uses two MOSFETS whose bias details are not shown and a 50-2coaxial cable. Transistor Q1 operates as a CS amplifier and Q2 as a CG amplifier. For proper operation, transistor Q2 is required to present a 50-2 resistance to the cable. This situation is known as “proper termination" of the cable and ensures that there will be no signal reflection coming back on the cable. When the cable is properly terminated, its input resistance is 50 2. What must gm2 be? If Qi is biased at the same point as Q2, what is the amplitude of the current pulses in the drain of Q1? What is the amplitude of the voltage pulses at the drain of Q1? What value of RD is required to provide 1-V pulses at the drain of Q2? DD Rp 50-N coaxial cable R2 = 50 2 5 mV nL Figure P7.120arrow_forwardD7.35 The bias arrangement of Fig. 7.53 is to be used for a common-base amplifier. Design the circuit to establish a de emitter current of 1 mA and provide the highest possible voltage gain while allowing for a signal swing at the collector of ±2 V. Use +10-V and -5-V power supplies. R₂4 +Vcc RE -VEE Figure 7.53 Biasing the BJT using two power supplies. Resistor R is needed only if the signal is to be capacitively coupled to the base. Otherwise, the base can be connected directly to ground, or to a grounded signal source, resulting in almost total 8-independence of the bias current.arrow_forwardWhat is the product of bandwidth called the maximum gain? And its usefulness in testing a common-biased emitter amplifier using the base impedance method ē 7:22 /arrow_forward
- (a) The NMOS transistor in the source-follower circuit of Fig. P7.122(a) has gm = 10 mA/V and a large r.. Find the open-circuit voltage gain and the output resistance. (b) The NMOS transistor in the common-gate amplifier of Fig. P7.122(b) has g = 10 mA/V and a large r.. Find the input resistance and the voltage gain. (c) If the output of the source follower in (a) is connected to the input of the common-gate amplifier in (b), use the results of (a) and (b) to obtain the overall voltage gain v/v. 5 ΚΩ 2/1/20 10 ΚΩ www 10 ΚΩ Τ Figure P7.122 (b) HH Vl 2 ΚΩarrow_forwardExample 7.2 -15 Consider an amplifier circuit using a BJT having Is = 10 power supply Vcc= 10 V. A, a collector resistance Rc = 6.8 k2, and a (a) Determine the value of the bias voltage VBE required to operate the transistor at VCE = 3.2 V. What is the corresponding value of 1? (b) Find the voltage gain A, at this bias point. If an input sine-wave signal of 5-mV peak amplitude is superimposed on VBE, find the amplitude of the output sine-wave signal (assume linear operation). (c) Find the positive increment in UBE (above VBE) that drives the transistor to the edge of saturation, where UCE = 0.3 V. (d) Find the negative increment in VBE that drives the transistor to within 1% of cutoff (i.e., to UCE = 0.99Vcc).arrow_forward7.33 Figure P7.33 shows a discrete-circuit amplifier. The input signal vig is coupled to the gate through a very large capacitor (shown as infinite). The transistor source is connected to ground at signal frequencies via a very large capacitor (shown as infinite). The output voltage signal that develops at the drain is coupled to a load resistance via a very large capacitor (shown as infinite). All capacitors behave as short circuits for signals and as open circuits for de. (a) If the transistor has V, = 1 V, and k, = 4 mA/V', verify that the bias circuit establishes Ves = 1.5 V, I, =0.5 mA, and V, = +7.0 v. That is, assume these values, and %3D verify that they are consistent with the values of the circuit components and the device parameters. (b) Find g„, and r, if V, = 100 V. (c) Draw a complete small-signal equivalent circuit for the amplifier, assuming all capacitors behave as short circuits at signal frequencies. (d) Find R, V/vig, v,/Vg» and v,/vig- +15 V 10 MN 16 k2 Rie = 200…arrow_forward
- Design an amplifier using the Voltage Divider Configuration shown in the figure below.A series of measurements are to be taken for the following values VB, VE, IE, VCE and IC.Give the expected values for these measurementsarrow_forward7. A transistor operating with nominal gm of 70 mA/V has a ß that ranges from 60 to300. Also, the bias circuit, being less than ideal, allows a 20% variation in Ic. What isthe largest value found of the resistance looking into the base?arrow_forward1. For the fixed-bias configuration of Fig. 7.75 a. Sketch the transfer characteristics of the device. b. Superimpose the network equation on the same graph. c. Determine ID, and VDS. d. Using Shockley's equation, solve for ID and then find VDS. Compare with the solutions of part (c). 14 V 1.8 kN Ipss = 12 mA VpsQ V, =-4V 1 MQ 1.5 V-arrow_forward
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